Sample and hold
Overview
The term "sample and hold" is used to describe a circuit that can "take a snapshot" of a continuously changing input voltage and output the equivalent "fixed" voltage continuously for a brief time. It can also be used to describe the action of the circuit.
Basics
In order to record information in a form that a binary computer can process; the information must: a.) not be changing in value and b.) be of a finite resolution.
The process of assigning a value of finite resolution is called quantization. Audio is typically transmitted between pieces of equipment as a voltage waveform that is constantly changing over time. It will have a finite voltage range; so as long as the quantization is sufficiently "fine" in resolution, the voltage steps generated in the decoding process will be a close enough approximation of the original analog voltage waveform to produce minimum distortion.
But how can a continuously changing voltage be measured? By using a sample and hold circuit. Conceptually; the circuit consists of two "gates" with an memory device in between them. The input gate is open at the beginning of the sampling period, and the output gate is closed. This allows the memory device to "acquire" the voltage of input voltage waveform and "follow" it as it changes. The input gate then closes, and the voltage as recorded by the memory device stops changing. The output gate then opens and allows the following device (an extremely accurate "voltmeter" known as an analog to digital converter) to measure the voltage while it is not changing. The output gate then closes and the input gate re-opens; repeating the process for the next sampling period.
There are many potential sources of error in a sample and hold circuit. The "memory device" is typically a small capacitor that must charge and discharge very rapidly to work at high sample frequencies. The "gates" are typically FET transistors; and there can be "glitches" generated when they switch that add errors to the "held" voltage across the capacitor. The output must be buffered by a very high speed amplifier to prevent current from flowing out of or into the capacitor when the output gate is opened; which would introducing more error. Because the output of the sample and hold circuit consists of a series of rectangular "pulses" with varying peak voltage; the output buffer must have excellent transient response to not introduce further error in the output that the ADC will measure.
Error in the sample and hold section of an Analog to digital converter is one of the factors that can cause AD converters operating at higher sample rates to be less accurate at audio frequencies than those operating at sample frequencies in the range of 44.1 to 96 kHz.