I2S - Revision history

Brad Johnson at 18:25, 19 May 2017

2017-05-19T18:25:08Z

Brad Johnson at 18:23, 19 May 2017

2017-05-19T18:23:32Z

Brad Johnson at 18:21, 19 May 2017

2017-05-19T18:21:23Z

Brad Johnson at 18:19, 19 May 2017

2017-05-19T18:19:56Z

Admin: /* Overview */

2014-12-03T22:18:01Z

Overview

Brad Johnson at 18:27, 23 July 2012

2012-07-23T18:27:14Z

Brad Johnson at 18:26, 23 July 2012

2012-07-23T18:26:25Z

Brad Johnson at 20:43, 2 July 2012

2012-07-02T20:43:17Z

Brad Johnson at 18:14, 11 May 2012

2012-05-11T18:14:55Z

Brad Johnson at 18:13, 11 May 2012

2012-05-11T18:13:17Z

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 ==Basics==
-Once the digital information is generated by the [[AD converter]]; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals:
+Once the digital information is generated by the [[AD converter]]; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a [[digital audio]] interface IC; and typically consists of three signals:
 # The [[Bit Clock]] which has one cycle for each "bit" in the serial data output of the AD converter.

@@ Line 5: / Line 5: @@
 Once the digital information is generated by the [[AD converter]]; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals:
-# The [[Bit Clock]] which has one cycle for each "bit" in the [[serial data]] output of the AD converter.
+# The [[Bit Clock]] which has one cycle for each "bit" in the serial data output of the AD converter.
 # The [[Word Clock]] which is at the sample frequency, and each half cycle is used to define whether the serial data is the left channel or right channel data (most contemporary converters are "stereo" two channel units). Sometimes referred to as "Left-Right Clock."
 # The [[Serial Data]] which is the digital code containing each sample's voltage level information. The information alternates between left and right channel data.

@@ Line 5: / Line 5: @@
 Once the digital information is generated by the [[AD converter]]; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals:
-# The "Bit Clock" which has one cycle for each "bit" in the [[serial data]] output of the AD converter.
+# The [[Bit Clock]] which has one cycle for each "bit" in the [[serial data]] output of the AD converter.
-# The "Word Clock" which is at the sample frequency, and each half cycle is used to define whether the serial data is the left channel or right channel data (most contemporary converters are "stereo" two channel units). Sometimes referred to as "Left-Right Clock."
+# The [[Word Clock]] which is at the sample frequency, and each half cycle is used to define whether the serial data is the left channel or right channel data (most contemporary converters are "stereo" two channel units). Sometimes referred to as "Left-Right Clock."
-# The "Serial Data" which is the digital code containing each sample's voltage level information. The information alternates between left and right channel data.
+# The [[Serial Data]] which is the digital code containing each sample's voltage level information. The information alternates between left and right channel data.
 This format is not intended for (external) transmission between digital audio devices and is subject to the same [[jitter]] and noise considerations as any other high frequency interface. Please see [[bit clock]] and [[AES]] for more details. Digital audio formats designed explicitly for transmission between pieces of equipment have an "embedded" bit clock as part of the electrical waveform, and the coding of the electrical waveform allows for these very high frequency signals to be transmitted with signal transformers; which allows them to work properly. Formats like I2s do not have the means to address serious issues that arise when transmitting very high frequency signals more than short distance because it requires DC transmission. The discussion of these issues is beyond the scope of this subject.
 [[Category:Terminology]]

@@ Line 3: / Line 3: @@
 ==Basics==
-Once the digital information is generated by the AD converter; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals:
+Once the digital information is generated by the [[AD converter]]; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals:
 # The "Bit Clock" which has one cycle for each "bit" in the [[serial data]] output of the AD converter.

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 ==Overview==
-The "I2S" interface format is "I squared S" and is also known as "Inter-IC Sound" or "Integrated Interchip Sound." In some cases; limitations in the text formatting can require it to appear as "I2S." The primary application of this interface is to connect digital audio IC's located on the same printed circuit board.
+The I²S interface format, pronounced as "I squared S" stands for "Inter-IC Sound" or alternatively, "Integrated Interchip Sound." Frequently, because of limitations in the text formatting it may appear written as "I2S." The primary application of this interface is to connect digital audio IC's located on the same printed circuit board.
 ==Basics==
 Once the digital information is generated by the AD converter; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals: